Specifically, the present invention relates to coating processes for a substrate which has a surface which is patterned in a substrate patterning region and has one or more trenches that are to be filled to a predetermined filling height; there should be no mechanical stresses produced and no holes formed during the filling process.
In semiconductor manufacture, structures with a high aspect ratio often have to be filled with predetermined materials. Structures of this type include inter-wordlines, STIs, trench capacitors, film capacitors, etc. In semiconductor manufacture, fabrication processes can often be simplified by performing selective deposition of a material provided as a thin film. It is in this way possible to provide what are known as “self-aligning” integration processes. Highly uniform and conformal layers, in particular thin films, can be produced by what is known as atomic layer deposition (ALD).
Atomic layer deposition of this type usually has extremely low deposition rates, such that only layer thicknesses in the region of one nanometer (nm) can be deposited in a deposition cycle. Hausmann et al. “Rapid Vapor Deposition of Highly Conformal Silicananolaminates”, Science, Volume 298, Oct. 11, 2002, pages 402-406, www.sciencemag.org have proposed a catalytic mechanism for increasing the deposition rates. Atomic coating processes of this type are important for semiconductor manufacture since it is possible to control the stoichiometry at atomic level.
The thickness of a film can be set by counting the number of reaction cycles in the usual way and is not generally subject to variations caused by a nonuniform distribution of gas or temperature in the reaction zone. Consequently, thin films with a uniform thickness distribution can easily be deposited over large areas. However, many applications in which atomic layer deposition could advantageously be employed are ruled out by the extremely low deposition rates of just a few nanometers (nm) per cycle. In the abovementioned publication by Hausmann et al., it is proposed to use catalytic deposition based on atomic layer deposition in which it is possible to achieve deposition rates of a few tens of nanometers (nm) per cycle.
Although the deposition process proposed by Hausmann et al. has achieved a deposition rate which is high for atomic coating processes, the process proposed by Hausmann et al. does not allow patterning of the layer.
FIG. 1(a), FIG. 1(b) and FIG. 1(c) illustrate conventional coating processes for patterned substrate surfaces which allow partial filling of the recesses which have been introduced into the substrate surface. FIG. 1(a) shows a substrate 101 which has a substrate patterning region 102 with a predetermined aspect ratio. The trenches designated by reference numeral 106 are to be partially filled with a material. The trenches 106 are usually designed in such a manner that their width increases in the upward direction, i.e. the structures arranged in the substrate patterning region 102 narrow slightly toward the top.
FIG. 1(b) shows the substrate 101 shown in FIG. 1(a) after a first coating step, in which a functional layer 103 has been applied to all the surfaces within the substrate patterning region 102. If atomic deposition by means of an atomic layer deposition (ALD) process is used, an extremely conformal layer deposition is achieved, and the uniform layer growth means that no holes are formed. However, it is often disadvantageous if a functional layer 103 is deposited on the side walls of the trenches 106. It may be desirable for only a base region 107 of the trenches 106 in the substrate 101 to be coated. For this purpose, as illustrated in FIG. 1(c), the raised structures are provided with a protective layer 104, in such a manner that the base region 107 of the substrate patterning region 102 remains uncovered.
Furthermore, it is possible for a protective layer 104 to be deposited on all the inner surfaces of the trench 106 and for the protective layer then to be opened up or removed in the base region 107 of the trench 106. Furthermore, the protective layer may also be deposited only on the side walls.
Conventional coating processes have the drawback that the deposition rates are extremely low. In particular the atomic layer deposition process, which can advantageously be used to avoid holes and stresses, has the drawback that only coating thicknesses in the region of a few nanometers per coating cycle can be achieved.
Therefore, it is an object of the present invention to provide a coating process for patterned substrate surfaces which allows structures with a high aspect ratio to be filled without the formation of stresses or holes.
According to the invention, this object is achieved by a process described in Patent Claim 1.
Furthermore, the object is achieved by a patterned substrate having the features of Patent Claim 25.
Further configurations of the invention will emerge from the subclaims.
A core concept of the invention consists in the trenches which have been provided in a patterned substrate surface being filled by means of a catalytically deposited reaction layer, in which case first of all a catalyst layer is introduced into the trenches that are to be filled in the substrate patterning region, then a reaction layer is deposited, and finally the reaction layer is densified and the process of introducing a catalyst layer, catalytically depositing a reaction layer and densifying it is repeated cyclically until the trenches have been filled up to a predeterminable filling height.
Therefore, an advantage of the present invention is that an atomic layer deposition process can be used to fill structures with a high aspect ratio. This opens up the possibility of filling deep trenches without stresses and without holes being formed. The process according to the invention allows a catalytic atomic layer deposition (ALD) process to be repeated cyclically such that a predetermined filling height is reached.
It is preferable to provide substrate regions or surface regions of a material on which a high deposition rate is possible.
The coating process according to the invention for patterned substrate surfaces substantially comprises the steps of:
a) providing a substrate, which has a surface which is patterned in a substrate patterning region and has one or more trenches to be filled to a predetermined filling height;
b) introducing a catalyst layer into the trenches that are to be filled in the substrate patterning region;
c) catalytically depositing a reaction layer in the trenches that are to be filled in the substrate patterning region;
d) densifying the catalytically deposited reaction layer in the trenches that are to be filled; and
e) repeating steps b) to d) until the predetermined filling height of the trenches to be filled has been reached.
The subclaims give advantageous refinements and improvements to the corresponding subject matter of the invention.
According to a preferred refinement of the present invention, the step of introducing the catalyst layer into the trenches that are to be filled in the substrate patterning region is carried out by means of a physical vapor deposition operation.
According to a further preferred refinement of the present invention, the step of catalytically depositing the reaction layer in the trenches that are to be filled in the substrate patterning region is effected by the substeps of:
(i) passing a gaseous precursor over the surface of the trenches which are to be filled and have been coated with the catalyst layer, in such a manner that the precursor and the catalyst layer catalytically react with one another;
(ii) passing a gaseous coating agent over the surface of the trenches which are to be filled and have been coated with the catalyst layer, in such a manner that a reaction layer is catalytically deposited; and
(iii) repeating steps (i) and (ii) above until the catalytic reactions effected by steps (i) and (ii) have ended.
According to yet another preferred refinement of the present invention, carrying out the sequence of steps (i) and (ii) described above once catalytically deposits of the reaction layer with a thickness of several nanometers (nm), preferably with a thickness of up to 100 nanometers (nm).
According to yet another preferred refinement of the present invention, the sequence of steps comprising steps (i) and (ii), which have been described above, is carried out cyclically, the number of cycles preferably being in a range between 0 and 200.
It is advantageous for the substrate to be composed of a silicon material or an insulating material. The substrate preferably has a substrate patterning region with a high aspect ratio.
According to yet another preferred refinement of the present invention, the catalytic deposition of the reaction layer in the trenches that are to be filled in the substrate patterning region comprises deposition of metal-semiconductor oxide materials, preferably of silicon oxide materials, and/or deposition of metal-semiconductor nitride materials, preferably of silicon nitride materials.
According to yet another preferred refinement of the present invention, the catalytic deposition of the reaction layer in the trenches that are to be filled in the substrate patterning region comprises deposition of a silicon dioxide thin film.
According to yet another preferred refinement of the present invention, the catalytic deposition of the reaction layer in the trenches that are to be filled in the substrate patterning region is carried out as an atomic layer deposition operation.
It is advantageous for the catalyst layer to be provided as a Lewis acid.
According to another preferred refinement of the present invention, the catalyst layer is deposited in the region of the trenches that are to be filled in the substrate patterning region at a predetermined angle with respect to the surface normal to the substrate surface.
It is advantageous for the coating process for patterned substrate surfaces to be carried out in the form of a low-pressure coating process which is carried out in a low-pressure reactor at an internal pressure in a pressure range from preferably a few mTorr to a few Torr.
According to yet another preferred refinement of the present invention, the temperature of the patterned substrate in the coating process is 50° C. to 700° C.
It is preferable for the reaction layer to be formed as a silicon dioxide layer (SiO2).
According to yet another preferred refinement of the present invention, the introduction of the catalyst layer into the trenches that are to be filled in the substrate patterning region is effected by selective deposition.
It is advantageous to carry out selective deposition of the reaction layer in the trenches that are to be filled in the substrate patterning region by means of a chemical vapor deposition process (CVD=Chemical Vapor Deposition or ALD=Atomic Layer Deposition).
To fill the structures in the substrate patterning region, it may be expedient for the catalyst layer to be deposited only on base regions of the trenches that are to be filled.
According to yet another preferred refinement of the present invention, the catalytic deposition of the reaction layer in the trenches that are to be filled in the substrate patterning region is carried out by means of an anisotropic deposition process.
According to yet another preferred refinement of the present invention, the step of densifying the catalytically deposited reaction layer in the filled trenches is carried out thermally. In this context, it is preferable for the densification of the catalytically deposited reaction layer in the filled trenches to be carried out thermally in a temperature range between 500° C. and 1300° C.
According to yet another preferred refinement of the present invention, the step of densifying the catalytically deposited reaction layer in the filled trenches is carried out thermally and in a surrounding atmosphere which consists of nitrogen and/or ammonia and/or noble gases and/or oxygen-containing gases (NO, N2+O, N2O).
It is advantageous for the catalyst layer to be formed from a Lewis acid, e.g. one or more of the elements Al, La, Zr, Hf, Ti, B and/or In.
The reaction layer may consist of silicon dioxide (SiO2) and/or silicon nitride (Si3N4). Furthermore, it is advantageous for the reaction layer to be formed from metal oxides, metal nitrides or pure metals.
The coating process according to the invention for patterned substrate surfaces makes it possible for a layer which is free of stresses and the formation of holes within the layer to be deposited in the substrate patterning region of the surface, in particular in the trenches formed in the substrate patterning region.
Exemplary embodiments of the invention are illustrated in the drawings, and explained in more detail in the description which follows.